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NXP P3B1602DP: 2-Bit I3C Bus Buffer With Voltage Translation

2026-10-15 · PartVane Electronics

On October 14, 2026 NXP published a blog post presenting the P3B1602DP as the first dedicated I3C bus buffer. The datasheet (Rev. 2.0, 9 September 2026) describes a 2-bit I3C bus buffer with automatic direction sensing and bidirectional voltage level translation.

Key specs (NXP datasheet and product page)

ItemP3B1602DP
Channels2-bit (SCL and SDA)
Port A supply0.72 V to 1.98 V
Port B supply1.08 V to 3.63 V
Max data rate12.5 MHz, I3C SDR and DDR; also I2C and SMBus
Capacitive loadUp to 100 pF
PCB traceUp to about 40 inches per datasheet
PackageTSSOP8, 3 mm x 3 mm
Orderable partP3B1602DPJ, 13-inch reel, 2,500 minimum order quantity

Check the operating temperature range against the current datasheet revision before design-in, since NXP pages list it differently across revisions.

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Where it fits

  • Extending an I3C bus across longer traces, connectors or board-to-board links
  • Translating between a low-voltage SoC (Port A) and higher-voltage peripherals (Port B)
  • Servers, accelerator cards, telecom line cards and industrial equipment

Availability

NXP lists the part as Active. For samples and production availability, confirm with NXP. We do not publish stock, price or lead time on this page.

Sourcing P3B1602DP

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