CH340G vs CP2102: USB-to-UART Bridge Comparison

If you need a USB-to-UART bridge on a board, two chips come up first: the WCH CH340G and the Silicon Labs CP2102. Both enumerate as a virtual COM port, both provide the full set of modem-control signals, and both appear on countless development boards. They differ in external component count, package, supply options, baud-rate accuracy, configurability and driver ecosystem. This comparison uses only the manufacturers' datasheets (WCH CH340 datasheet V3D and Silicon Labs CP2102/9 datasheet Rev. 1.8) plus the vendors' product pages.

WCH CH340G at a glance

The CH340 family is a full-speed USB device that converts USB to an asynchronous serial port (or a printer port). From the WCH datasheet:

Baud rates from 50 bps to 2 Mbps, with a built-in transmit/receive buffer and full-duplex hardware UART.
Modem signals RTS, DTR, DCD, RI, DSR and CTS.
Runs from 5 V or 3.3 V. At 5 V, VCC gets 5 V and the V3 pin gets a 0.1 µF decoupling capacitor. At 3.3 V, V3 is tied to VCC.
The CH340G comes in SOP-16 and is rated -40 to 85 °C.
USB pull-up and transceiver are internal. WCH recommends connecting UD+ and UD- directly to the bus without series resistors.

The key hardware point is the clock. The CH340G (like the CH340T and CH340R) needs an external 12 MHz clock. In practice that means a 12 MHz crystal between XI and XO with load capacitors to ground. WCH's application note gives 33 pF for a quartz crystal, or the resonator maker's recommended value (typically 47 pF) if you use a low-cost ceramic resonator. The XI input frequency is specified at 11.98 to 12.02 MHz.

CH340C and CH340K: crystal-free variants

WCH states that the CH340C, CH340N, CH340K, CH340E, CH340X and CH340B have a built-in clock and need no external crystal or capacitors. The CH340C is also SOP-16 and uses the same SOP-16 pin table as the CH340G, except pins 7 and 8: XI and XO on the G become NC and OUT# on the C. The CH340K is an ESSOP-10 part with three built-in diodes that stop back-feeding from an independently powered MCU. There are two trade-offs to check:

Baud accuracy: WCH specifies transmit baud error below 0.3% for the crystal-based CH340G/T/R, against below 1.8% for the internal-clock C/N/K/E/X/B parts. The receiver tolerates about 2% error.
Temperature range: the CH340G/T/R are rated -40 to 85 °C, but the CH340C/N/K/E/X/B are rated only -20 to 70 °C.

Silicon Labs CP2102 at a glance

The CP2102 is a single-chip USB 2.0 full-speed to UART bridge in a 5 x 5 mm QFN-28. From the Silicon Labs datasheet:

Integrated clock, so no external crystal (a calibrated internal 48 MHz oscillator). The USB transceiver is also integrated and needs no external resistors.
1024-byte internal EEPROM for USB VID, PID, serial number, power descriptor, release number and product strings, programmable over USB during manufacturing. The default VID/PID is 10C4h/EA60h.
On-chip 3.3 V regulator. Bus-powered input on REGIN is 4.0 to 5.25 V, self-powered VDD is 3.0 to 3.6 V, and the regulator can supply up to 100 mA to external 3 V circuitry.
UART supports 5 to 8 data bits, 1/1.5/2 stop bits, all parity modes, hardware or X-On/X-Off handshaking. The feature list says 300 bps to 1 Mbps, and the standard baud-rate table tops out at 921,600 bps.
576-byte receive buffer and 640-byte transmit buffer. Operating range -40 to 85 °C.

The datasheet front page states: "For newer designs, the CP2102N devices offer compatible footprints and are recommended for use instead of the CP2102/9." Silicon Labs also publishes AN976, a CP2101/2/3/4/9 to CP2102N porting guide. On the product page, Silicon Labs says it expects to continue full production of the CP2102 until at least March 2029.

Side-by-side comparison

Parameter	WCH CH340G	Silicon Labs CP2102
Max baud rate	2 Mbps (50 bps–2 Mbps)	1 Mbps per feature list (300 bps–1 Mbps); standard table to 921,600 bps
Package	SOP-16 (1.27 mm pitch)	QFN-28, 5 x 5 mm
Clock	External 12 MHz crystal required	Integrated oscillator, no crystal
External parts (minimum)	12 MHz crystal + 2 load caps (33 pF typ.), 0.1 µF on VCC, 0.1 µF on V3 at 5 V	Decoupling only (1.0 µF + 0.1 µF on REGIN, 0.1 µF on VDD in the typical circuit); ESD diodes recommended on USB lines
Supply	5 V (4.0–5.3 V) or 3.3 V (2.9–3.6 V, V3 tied to VCC)	Bus-powered 4.0–5.25 V via internal regulator, or self-powered 3.0–3.6 V
Operating current (typ./max)	7 / 20 mA at 5 V	20 / 26 mA (regulator enabled)
Config memory	None on CH340G (CH340B has EEPROM)	1024-byte EEPROM (VID/PID, serial, strings)
Regulator output for other circuits	No (V3 is an internal 3.3 V node for decoupling)	Yes, 3.3 V, up to 100 mA
Operating temperature	-40 to 85 °C	-40 to 85 °C
Driver support	WCH CH341-series VCP driver (Windows); Linux mainline ch341 driver	Silicon Labs VCP drivers for Windows, macOS and Linux (default drivers WHQL-certified); Linux mainline cp210x driver; USBXpress direct-access API

Which one should you design in?

Choose the CH340G (or CH340C/K) when

You want a leaded SOP-16 package that is easy to hand-solder, inspect and rework.
You need baud rates above 1 Mbps. The CH340 table includes 1.5 Mbps and 2 Mbps. WCH recommends its CH343 with hardware flow control for one-way traffic of 1 Mbps and above, or two-way traffic of 500 kbps and above.
You can afford the crystal and two capacitors, or you can accept the narrower temperature range and looser baud accuracy of the crystal-free CH340C/K.

Choose the CP2102 (or CP2102N for new work) when

You want the lowest external part count and a small QFN footprint.
You need custom USB descriptors, meaning your own VID/PID, product string or unique serial numbers so multiple units can be told apart on one PC. Silicon Labs recommends customising VID/PID to avoid driver conflicts.
You want the bridge's 3.3 V regulator to power a small MCU or sensor.
Your customers use macOS or need certified Windows driver packages from the chip vendor.

Layout and firmware notes

CH340G crystal: keep the crystal and load capacitors close to XI/XO and place the decoupling capacitors close to VCC and V3, as WCH's application note advises.
Auto-reset circuits: both chips provide DTR and RTS. On the CH340G, DTR# also acts as a configuration input during enumeration: a 4.7 kΩ pull-down makes the device request a larger supply current. Check this before adding pull-downs to DTR# for MCU auto-reset.
Self-powered designs: on the CP2102, if VDD or REGIN can be unpowered while VBUS is at 5 V, Silicon Labs requires a resistor divider on VBUS. On the CH340, if the board has its own supply, WCH recommends powering the CH340 from that supply to avoid back-current through the I/Os.
Swapping bridges: the two chips are not pin-compatible and use different drivers and VID/PIDs, so a swap means a new footprint and new host-side driver instructions.

Sourcing

Need CH340G or CP2102 in volume? Send an RFQ with your part number, quantity and delivery date, and we will come back with available options for the CH340G and CP2102-GMR.

CH340G vs CP2102: Which USB-to-UART Bridge Fits Your Design?